Steve Anderson, Senior Director of Product & Technology Marketing for Advanced Technology at STATS ChipPAC
Steve Anderson leads business development activities in wafer level packaging, flip chip and test services. Before joining STATS ChipPaC, Steve was the President of CT Innovate. Prior to this, he was the CEO at Surfect Holdings and President of Silicon bandwidth. He was also Senior VP, Corporate Marketing and Business Development at Amkor. Steve holds a Bachelor of Science degree in Electrical Engineering from the University of North Dakota.
Mike Campbell, Senior Vice President of Engineering at Qualcomm Technologies
Mike Campbell is responsible for QCT Product and test engineering, test automation and Failure analysis. Mike joined QCT in 1996 as a Staff engineer/Manager. Since that time Mike has held a diversity of management positions within QUALCOMM. He has been responsible for various groups, including Design Automation, Yield Optimization, Product Engineering, Test Engineering, and Foundry Semiconductor analysis. In his roles Mike initiated development offices in Bangalore and Singapore. In his current role, he is working to optimize the infrastructure and engineering required to bring leading edge products to market (faster) by developing partnerships/processes to optimize design stability, yield and test time early in the product cycle. Prior to joining QUALCOMM, Mike was an engineer and manager at several semiconductor companies, including Mostek, INMOS and Honeywell. He holds a BSEE and CE from Clarkson University.
Jae Cho, Vice President of NPI Engineering at Xilinx
Jae Cho’s charter is to characterize, debug and test new generations of FPGA products and move them to volume production. This includes introducing the industry’s first Zynq™- 7000 all Programmable System-on-a-Chip (SoC) device family (ARM®-based FPGA), and the world’s first all Programmable 3D IC device enabled by Stacked Silicon Interconnect (SSI)– the Virtex®-7 2000T. Cho joined Xilinx in 1996 after serving in a variety of product and test development positions at National Semiconductor and Zilog. Cho earned a BSEE from Case Western Reserve University. He holds six U.S. patents.
Christopher Danely, Managing Director - Equity Analyst at J.P. Morgan
Christopher Danely is the Managing Director and global coordinator for J.P. Morgan’s semiconductor research team. He was ranked #1 in the 2012, 2010, 2009, 2008 and 2007 Institutional Investor All America polls and #3 in the 2011 poll. Prior to joining J.P. Morgan, Danely was a Vice-President and senior semiconductor analyst at the #1 II ranked semiconductor team at Merrill Lynch for three years and also previously worked at Prudential Securities for two years. Danely’s views on the semiconductor industry have been featured in major news publications such as The Wall Street Journal, Forbes, and Investor’s Business Daily.
Paul Farrar, Jr., General Manager of Global 450mm Consortium (G450C) and Vice President for Manufacturing Innovation at CNSE
Paul Farrar was named General Manager of the Global 450mm Consortium (G450C); CNSE Vice President for Manufacturing Innovation in September 2012. He was at IBM for 34 years, most recently as VP for Albany Expansion, a role he was appointed to in March 2010. He is also on the governing board of CCNI, a super-computer partnership between New York State, IBM and Rensselaer Polytechnic Institute. For seven years, he was Vice President for Semiconductor Process Development at IBM. In this role, he managed 700 IBM and partner Research and Development engineers and scientists and was responsible for Unit Process, Lithography and Characterization. Previously, he held numerous positions at IBM in Manufacturing and Development.
Jim Feldhan, President at Semico Research
Jim Feldhan founded Semico Research in 1994. A 20-year veteran of the semiconductor industry, he brings his management, forecasting and modeling expertise to Semico, along with a reputation of quality research. Jim designed and developed the research methodologies and report structures, which are the basis for Semico’s Custom Research and Portfolio Services. Jim also develops Semico’s overall economic outlook as well as performing various semiconductor consulting and forecasting. With a focus on quality, Semico Research has grown to the largest semiconductor-focused consulting and research firm.
Phil Garrou, IEEE Fellow
Dr. Garrou consults and is an expert witness in the areas of IC packaging and electronic materials. He is currently a senior consultant for Yole Developpement and blogger (“Insights from the Leading Edge”) for Solid State Technology. He has served as President of the IEEE CPMT (2003-2005) and IMAPS (1998), and is a Fellow of both organizations. He has authored three microelectronic texts including “Handbook of 3D Integration.” He has won the Milton Kiver Award for Excellence in Electronic Packaging (1994); the Fraunhoffer International Advanced Packaging Award (2002); the IEEE CPMT Sustained Technical Achievement Award (2007) and Feldman Outstanding Contribution Award (2012); and the IMAPS Ashman Award (2000). He retired from Dow Chemical in 2004 as Global Director of Technology for their Advanced Electronic Materials business unit.
CP Hung, Vice President of the Corporate R&D Center at ASE (Advanced Semiconductor Engineering) Inc.
CP Hung is responsible for next generation product development with integrated technologies and enabling chip, package and system concurrent design solutions. His previous roles were VP of Corporate Design, VP of Central Engineering / Business Development and VP of Logistic Service Integration. In 2005, he received the Industrial Technology Outstanding Youth Creative Award of Ministry of Economic Affairs from the President of the Republic of China. He has 39 patents on packaging structure, process, substrate and characterization technology and has published over 27 conference/journal papers. CP Hung received his Ph.D. from the Department of Electrical and Electronic Engineering at the University of Paisley in the U.K.
Dan Hutcheson, CEO at VLSI Research
Dan is CEO and Chairman of VLSI research and weSRCH.com. He is a well-known visionary, helping companies make businesses out of technology for over 30 years and is arguably best known for his many predictions of strategic industry infrastructure shifts. Dan is a senior member of the IEEE and a recipient of SEMI’s Bob Graham Award for outstanding contributions in marketing. He has authored numerous publications, including two invited articles for Scientific American. His pro bono work has included serving as an advisor on innovation to the White House Council of Economic Advisors in the Clinton Administration, teaching invited courses on Manufacturing Economics and The Economics of the Internet at Stanford University, and serving on the Board of Advisors to the Extension School at UC Berkeley.
Devan Iyer, Director of Worldwide Semiconductor Packaging Operations at Texas Instruments
As Director of TI’s Worldwide Semiconductor Packaging operations, Dr. Mahadevan “Devan” Iyer oversees a global team that drives a process to determine the packaging design and technologies that best meet the requirements of our customers in measures of miniaturization, performance cycle time, and cost. Dr. Iyer joined TI in 2008 to lead the global SC Packaging team. He has more than 25 years of experience in the microelectronics industry. Dr. Iyer is a recognized authority in semiconductor packaging technologies. He has more than 150 technical publications and 28 patents to his credit.
Subu Iyer, IBM Fellow, Microelectronics Div. of IBM Systems & Technology Group
Subramanian S. Iyer is responsible for technology strategy and competitiveness, embedded memory and three-dimensional integration. He obtained his B.Tech at IIT-Bombay and Ph.D. at UCLA. His key technical contributions have been the development of the world’s first SiGe base HBT, electrical Fuses, eDRAM and 45nm technology used at IBM and IBM’s development partners. His current technical interests and work lie in the area of 3-dimensional integration for memory sub-systems and the semiconductor roadmap. He is a Distinguished Alumnus of IIT-Bombay and received the IEEE Daniel Noble Medal for emerging technologies in 2012.
Dick James, Senior Technology Analyst at Chipworks
Dick James is a 40-year veteran of the semiconductor industry and the senior technology analyst for Chipworks, an Ottawa, Canada-based specialty reverse engineering company. Chipworks analyses a broad range of devices, giving Dick a unique overview of what technologies make it into the real world of semiconductor production.
Scott Jones, Vice President at Alix Partners
Scott Jones is currently a Vice President at Alix Partners servicing the Hi-Tech industry as an analyst and consultant. Previously Scott was an equity analyst with JPMorgan covering the semiconductor sector and spent seven years with Intel Corporation in finance and operations. Scott also has his Juris Doctorate from Santa Clara University with a concentration in law for Hi-Tech companies as well as an MBA from the University of Arkansas.
Robert Lanzone, Sr. VP Advanced Wafer Level and Package Development at Amkor Technology Inc.
Robert (Bob) Lanzone has been in the electronics industry for over 28 years working in diverse and progressive roles in advanced packaging development, technology, manufacturing, marketing, and business development. He has worked for industry leaders in their respective fields or market segments such as IBM, Kyocera, Unitive, ChipPAC and currently Amkor. His current focus is on 3D packaging integration including Fine Pitch Flip Chip, Cu Pillar, and next generation Package on Package. Through his years of experience, Bob has worked with many leading suppliers / customers in the supply chain from Fabless, Integrated Device Manufacturers, Foundry, SATS, and EMS providers. His technical background spans advanced packaging arenas such as: Flip Chip, Wafer level Packaging, High & Low Temperature Co-fired Ceramics, High Density Build Up Organics, Ball Grid Array, 3-D, Stacked, Chip Scale Packaging, and Surface Mount Technology. He has authored a number of papers on these subjects and presented at numerous technology conferences and symposia.
Lode Lauwers, Senior Director Business Development at imec
Lode has been heading imec’s team of business development managers since 2009, with a responsibility for the IMEC business interactions in all R&D fields. Previously, he was Director Strategic Program Partnerships in imec’s nanoelectronics R&D Center in Leuven, Belgium. In this role, he was responsible for business and partner interactions in imec’s core program in CMOS technology, in partnership with leading IC companies worldwide. Prior to that, he was the general manager of ASIC design house Easics NV, a wholly owned subsidiary of TranSwitch Corporation, a provider of Application-Specific Standard Products for the telecom industry. From 1992 to 2000, he was sr. scientific advisor in IWT, institute for the promotion of Science and Technology in Flanders, where he coordinated and advised for government funding in local and European cooperative networks in micro-electronics and telecommunications. From 1985 until 1992, he was researcher in imec, in the area of MOS device modeling and simulation, which was also the subject of his PhD in 1993.
Mr. Yoon-Woo Lee, Executive Advisor at Samsung Electronics Co., Ltd.
Prior to his current position, Mr. Lee served as Vice Chairman and CEO of Samsung Electronics from May 2008 to December 2009; Chairman of the Board of Directors from May 2008 to December 2010; and Vice Chairman from December 2010 to December 2011. An engineer and 40-year veteran of Samsung, Mr. Lee’s leadership and in-depth technology expertise have helped build Samsung into the world’s largest electronics company. He is widely credited with the success of Samsung’s Semiconductor Business, and implementing policies and training programs that have earned Samsung the reputation of being the best company to work for in Korea.
Mr. Lee has been with Samsung since 1968. He served as the Managing Director of Giheung’s main semiconductor plant operations in 1987, and was appointed as the President of Samsung’s Semiconductor Business in 1996. Demonstrating his business acumen in a dynamic and fast-paced semiconductor industry, he successfully implemented diversification strategies that allowed the Semiconductor Business to navigate through cyclical market downturns while increasing market share, year after year. In 2004, Mr. Lee was promoted to Vice Chairman in charge of Global Collaboration, and also was appointed Head of the Samsung Advanced Institute of Technology. In 2005, he became Chief Technology Officer, responsible for planning mid- to long-term strategies for promoting new business development based on cutting-edge technologies.
Mr. Lee serves in numerous industry leadership positions including Vice Chairman of Seoul Chamber Commerce & Industry, Vice Chairman of Korea-Japan Economic Association, and Vice Chairman of Korea Business Council for Sustainable Development. In 2005, he was honored by the Korea Management Institute as CEO of the Year. Mr. Lee graduated from Seoul National University with a bachelor’s degree in Electrical Engineering.
Marcus Lentz, Sr. Industry Analyst at SEMATECH
Marcus Lentz is currently the Sr. Industry Analyst at SEMATECH since 2011. In this role, he provides analysis in the following areas: semiconductor market analysis, strategic technology analysis, industry economic analysis, cost modeling, etc. He has more than 25 years of experience in the semiconductor industry in various engineering, strategic planning, and sales/marketing roles.
Mike Ma, Vice President of Corporate Research and Development at Siliconware Precision Industries Co., Ltd (SPIL)
Prior to his joining SPIL in 2010, Dr. Ma held a variety of positions at United Microelectronics Corporation (UMC) for over 14 years, including Director of Corporate Marketing and Director of Exploratory Technologies Development in R&D, where he was responsible for 28nm technology (including high-k dielectric and metal gates) initial development and 65nm SOI technology development. Before working in R&D, he was Departmental Director of Process Integration Engineering of Fab 8D, Process Section Manager, and a member of two fab start-up teams. Dr. Ma also worked at WaferTech L.L.C. (now a TSMC company), the Institute of Microelectronics (IME) of Singapore, and the Metal Industries Research & Development Centre (MIRDC). He received his B.S. Degree from National Cheng-Kung University, M.S. from Northeastern University of Boston and Ph.D. degree from North Carolina State University; all majors in Materials Science and Engineering.
Bill McClean, President at IC Insights, Inc.
Mr. McClean began his market research career in the integrated circuit industry in 1980 and founded IC Insights in 1997. During his 33 years of tracking the IC industry, he has specialized in market and technology trend forecasting and was responsible for developing the IC industry cycle model. At IC Insights, he serves as managing editor of the company’s market research studies and reports. In addition, he instructs for IC Insights’ seminars and has been a guest speaker at many conferences (e.g., SEMI’s ISS and Electronic Materials Conferences, the China Electronics Conference, and the European Microelectronics Summit). Mr. McClean received his Bachelor of Science degree in Marketing and an Associate degree in Aviation from the University of Illinois.
Michael Noonen, Executive Vice President of Global Sales and Marketing at GLOBALFOUNDRIES
Michael Noonen joined GLOBALFOUNDRIES in January 2012 with over 25 years of high technology product management, sales and marketing experience. Most recently he served as executive vice president, sales and marketing, with NXP Semiconductors from 2008 to 2011. Along with NXP’s CTO, he crafted and implemented NXP’s High Performance Mixed-Signal Strategy that resulted in 11 consecutive quarters of growth, a $5 billion business and NXP’s successful IPO in 2010.
Previous to NXP, Noonen held several leadership positions with National Semiconductor, including vice president of the company’s Interface, Networking and Computing Businesses from 2001 to 2005 and senior vice president of Worldwide Sales and Marketing from 2005 to 2008, which were the most profitable years in the company’s history. Before joining National Semiconductor, he also worked for Cisco, 8x8, and NCR Microelectronics.Noonen holds a Bachelor of Science degree in electrical engineering and holds multiple patents in the areas of internet telephony and video communications.
Robert Patti, CTO and VP of Design Engineering at Tezzaron Semiconductor (Singapore) Pte Ltd
Robert Patti is a member of IEEE and the former Vice-Chair of JEDEC’s DDRIII / Future Memories Task Group. In 2009 he received the North American SEMI award for pioneering work in the emerging technical area of 3D IC integration. He holds 16 US patents, numerous foreign patents, and many pending patent applications in deep sub-micron semiconductor chip technologies. In 1985 he received his BS (EE/CS) and BS (Physics) from Rose-Hulman Institute of Technology. Currently, Robert is engaged in the design of next generation 3D memory devices for exascale computing. These devices will combine 3D integration of very deep sub-micron devices and photonics for inter memory module communication.
Sanjay Rajguru, Director of International SEMATECH Manufacturing Initiative at ISMI
Sanjay Rajguru is responsible for the consortium’s manufacturing technology programs, which are focused on the systematic improvement of manufacturability, including factory and equipment stability, productivity and cost improvements, and equipment lifecycle management. In addition, he is responsible for overseeing the ISMI ESH Technology Center, the industry’s first worldwide collaborative research organization including chip manufacturers and equipment and material suppliers devoted to collectively finding and implementing the most cost-effective, environmentally friendly manufacturing processes and procedures. Prior to joining ISMI, Rajguru was a fab manager at National Semiconductor for 13 years and has also held engineering and management positions with Nortel Semiconductors, including Director of Operations for the Optoelectronics Division, Fab Manager for Silicon, GaAs and SAW devices, Process Engineering Manager and Lithography Process Engineer. He graduated from Carleton University in Ottawa, Canada with a degree in Electrical Engineering.
Julian Richards, Project Manager at ISMI
Julian Richards has responsibility for chairing the Manufacturing Methods Council (MMC) for ISMI’s member companies. The MMC brings together the fab managers and IE’s to exchange ideas to improve cycle-time, output and costs. Julian also leads various semiconductor equipment productivity forums and related improvement projects. He joined Sematech two years ago after five years with Bridge Semiconductor Corp, where he was VP of Engineering and Manufacturing, leading the development of a low-cost infrared sensor and camera system for volume applications. Prior to joining Bridge, Julian was at Princeton Lightwave Inc. as Manufacturing Director and before that, was Director of Operations at Nortel Networks. He began his career as a Fab Process Engineer and spent over 15 years in various fab engineering roles at Nortel and Plessey Semiconductors before moving into leadership roles. Julian received a Bachelor’s degree with honors in Materials Science from Brunel University of West London. He is also a certified six-sigma black belt.
Bill Ross, Project Manager at ISMI
Bill is the chair of the Equipment Obsolescence Forum for the International Semiconductor Manufacturing Initiative at SEMATECH. This forum focuses on obsolescence avoidance and related legacy manufacturing issues. Bill is also the chair of several equipment productivity forums and improvement projects. He has been with SEMATECH for two years. Prior to SEMATECH, bill held a variety of positions focused on equipment engineering and maintenance. He was the owner of Primary Source, which focused on contract engineering services that reduced cost of ownership and the remanufacture of manufacturing equipment and sub-components.
Ted Tessier, Chief Technical Officer at FlipChip
Ted has more than 25 years of experience in the semiconductor packaging industry and a comprehensive industry perspective based on senior engineering and management positions at Nortel, Motorola, Biotronik, Amkor, STATSChipPAC and FCI. He has published actively and is well known in the industry for his work in the areas of advanced packaging technologies including wafer bumping, multichip modules/System in Package technologies, WLCSPs, flip chip, 3D packaging and embedded die technologies.
Mark Thirsk, Managing Partner at Linx Consulting
Mark Thirsk has over 20 years experience in the chemical industry working with a variety of materials and processes utilized in wafer fabrication. Having been on both sides of the fence as a user and seller of materials and equipment, as well as being intimately involved with major materials manufacturers, Mark is well placed to bring clarity and insight into understanding markets from both a technical and commercial perspective. Previous to Linx, Mark was Senior Marketing Manager at Rohm and Haas Electronic Materials where he was responsible for strategic planning and new business development. Additionally, Mark has served in the SEMI Chemicals and Gases Manufacturers Group (CGMG) since 1999, acting as Chairman from 2001 to 2003.